Reaktor - Create sample & hold
No sample and hold to be found in the new and old core library ....go figure /.
So triggering signal is a square , when square is high it samples and hold the input signal .
First part is easy , square into comparsion , when >0 , then into router , but how would one hold the input signal at that specific time and send out a constant ( constant = value of signal at that specific time ) ?
Comments
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sample and hold is literally a latch in core.
A sample and hold has two inputs, one for a signal, the other for a trigger.
When there is an event or gate at the trigger input, the output changes to the instantaneous value at the signal input at that time.
That's exactly what a core latch does.
If you want it to behave like an analogue one where the trigger signal is continuous, then there are different ways to handle converting a gate signal into events.
Simplest is just testing when the signal changes from less than or equal to zero to greater than zero, and pump out an event when that occurs.
An alternative is to build in some hysteresis, but that's only necessary if you want to handle real world noisy signals.
Or you can do some sort of slope detect (many hardware devices need a steep edge or the detect fails, so if you are building some sort of accurate model then that might be more 'correct')
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Don't you think I have tried that , I 'm not that much of core noob .
Just to carify we're on the same page .
Input trigger signal is square , with state 0-1 .
SIgnal to be sampled ( saw ) rising value value from 0-->1
When trigger signal is 1 , the saw value must be sampled and output , s if the current value of was is 0.7 , it keeps that value of 0.7 as long as the pulse is 1 .and that is not how a latch behaves .
A latch wil then start outputing the saw from value 0.7 --->0.8--->etc. until the pulse trigger fals to zero .
The issue I am facing is
1) square out 0 is still considered an audio stream will thus trigger read .
2)Saw signal should be HOLD at current vaue
The write and read mem module don't , neither latch does the job .(which is write read ) , it let's the signal through continiously , it doesn't hold it .
The read operation must only be triggered when pulse = 1 , and should let the signal(saw or noise etc...) out at the current value only .
In my example the square= trigger , saw = signal
This doesn't work eiher becasue the whole signal is let through when pulse is high
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Read my last post more carefully.
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I have
So if you can could post a working example , much appreciated
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OK, I'll quote myself:
Simplest is just testing when the signal changes from less than or equal to zero to greater than zero, and pump out an event when that occurs.
This is all you need. Use the event you get to drive a latch and you have a sample and hold that works with an audio rate gate stream.
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Core is so untuitive t makes my head spin +the fact I forget basic stuff I remembered years ago
Why does a read mem. output a value when it's not even triggered , then I remember I had to put a merge afterwards
Doesn't make any sense at all (to me )
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Why does a read mem. output a value when it's not even triggered
...because every empty input gets an implicit zero value event during initialisation. I suppose this was done maybe to simplify the compiler, so improve compile times? it guarantees that every input always gets some sort of event at initialisation, so they can all be treated similarly by the compiler
It also means there doesn't need to be a special case rule for every thing for what to do when some combination of inputs are not connected. Just have the same rule for all of them.
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Here ya go, this is the simplest approach that takes an audio stream for both inputs.
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Sorry but that's the whole point , the event that has to drive the latch is a continous stream of an audio pulse between 0 and 1 .
I don't know if the primary s-h is wrong or not , but the square input holds the signal inpu value even when at <0 .
3 screenshots the left channel is the raw square input (trigger ) , the right channel is the primary S/H output (using a slow saw wave )
The signal is held
Rasing the rate of the trigger increases the number of sample points taken from the signal input , iow increases resolution .
In core I got this , the saw is always let through when pulse is >0
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Sorry but that's the whole point , the event that has to drive the latch is a continous stream of an audio pulse between 0 and 1 .
yes, and the way I explained will do that (I just made a post that you might have missed while writing yours with an example)
You need to test when the gate signal goes from less than or equal to zero to greater than zero, and output an event at that moment to drive the latch... basically a zero crossing detector...
If your gate signal is always greater than 0, then use some other test... test for crossing 0.5, or test for when the slope crosses some 'steepness' value... You can introduce hysteresis if necessary to prevent problems with a noisy control signal... but usually testing for lest than or equal to zero vs greater than zero works just fine.
(I'm typing out 'greater than zero' every time and it irks me!!! , because this stupid forum software uses the greater than symbol for quoting... so stupid, and particularly so for a technical forum where folk will be discussing maths... !!!)
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I would be gratefull if you just post a working example , then I 'll take the time to examine it and ask questions afterwards .
The bigger issue is to SAMPLE the signal see my last screenshot
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The problem you have is that you are firing the latch on every tick when the gate is high. You need to do it each time the gate goes from low to high, not while it remains high after that.
See three posts up, I posted pics of every layer of a working example. Just use those as a template.
There are five components to the sample and hold macro!
You will need to find the Latch [-1] macro and the Router LE macro. Those are in the factory library, one is in 'Memory', the other in 'Flow'... you also need a standard Latch
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THanks , haven't seen your previous post + example .
Works perfectly , the missing links were the router macro +latch -1 ( structure seems like a normal latch but with reversed obc )
I would have never thought of using these .
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it basically compares the previous value and the new value both against zero to see if zero was crossed and sends an event if it was, so you only get a sample when the gate goes, rather than every SR tick while the gate remains high
latch[-1] is identical to the old z^-1 macro... you could use either of the new z^-1 macros instead, maybe the 'z^-1 ffd' macro is technically more correct, it really depends if you need the reset mechanics or not... I like the latch[-1] here because it externalises its clock so you can use the same macro with some differently clocked stream and you won't get punished cpu wise for not overriding the SRC (it's also simpler to understand).
Look inside the z^-1 macros and you will see that they are driven internally by SR.C, whereas the latch[-1] externalises it's trigger input.
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I am amazed how the square wave looks after processing it , this is the actual ouptput of the pusle wave ( the saw is completemydisconnected )
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